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EDFAS Silicon Valley Failure Analysis  
Workshop 2025 

Join us for the inaugural Silicon Valley Failure Analysis Workshop, hosted by Covalent Metrology Labs in Sunnyvale, CA. This one-day event offers a unique opportunity to explore emerging trends in semiconductor failure analysis through expert talks, and lab tours.

00 Days
00 Hours
00 Mins
00 Secs
When
Tuesday, August 12th 8:30 AM PST
Where
Covalent Metrology – 925 Thompson Place, Sunnyvale, CA, 94085
Duration
Full day

Event Description

Brought to you by EDFAS, this first-of-its-kind workshop brings together top minds in failure analysis to share insights, innovations, and proven techniques shaping the future of the semiconductor industry. Attendees will experience guided lab tours showcasing advanced FA tools, along with technical presentations. The event provides hands-on access to equipment, face time with industry technologists, and a chance to connect with fellow professionals. Whether you're looking to sharpen your skills or stay ahead of industry trends, this workshop is designed to fuel your professional growth.

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Register Now

Attendance is complimentary with registration - no fees required

Event Speakers

Cecile S. Bonifacio

Cecile S. Bonifacio

Senior Applications Scientist

E.A. Fischione Instruments Inc.

David Sampson

David Sampson

America's Regional Product Lead

TESCAN

Joy Liao

Joy Liao

Sr. Manager Silicon Failure Analysis

NVIDIA

James Colvin

James Colvin

CEO

FA Instruments, Inc.

Ken Wu

Ken Wu

Senior Product Specialist for SEM/SDB

Thermo Fisher Scientific

Michael DiBattista

Michael DiBattista

Vice President

Varioscale, Inc.

Rosalinda M. Ring

Rosalinda M. Ring

Director of Applications & Engineering

NenoVision

Terrence McGuckin

Terrence McGuckin

Founder

Ephemeron Labs

Valerie Brogden

Valerie Brogden

Technical Operations

Covalent Metrology

William A Hubbard

William A Hubbard

CEO

NanoElectronic Imaging, Inc.

William Lo

William Lo

Hardware Engineer

NVIDIA

Event Schedule

Subject to change; final agenda will be provided to registrants

Time
Speaker
Subject
Description
Time
8:30 am -- 9:00 am
Speaker
Subject
Morning coffee break
Description
Time
9:00 am -- 9:30 am
Speaker
Subject
Overview and schedule for the day
Description
Time
9:30 am -- 10:00 am
Speaker
Michael DiBattista
Subject
UV-Guided Substrate Delayering
Description
A novel method for backside IC delayering using UV photon monitoring and water-assisted FIB sputtering to precisely expose interconnect layers in advanced nodes.
Time
10:00 am -- 10:30 am
Speaker
James Colvin
Subject
FA Workflow and Sample Preparation
Description
Learn how the Failure Analysis mindset and sensitivity characterization enable fault localization on difficult devices, using external stimulus or device emanation detection.
Time
10:30 am -- 11:00 am
Speaker
Joy Liao
Subject
Time-Domain Reflectometry in FA
Description
Case studies and developments using EOTPR to enhance chip-level failure analysis alongside traditional techniques.
Time
11:00 am -- 11:15 am
Speaker
Subject
Coffee break
Description
Time
11:15 am -- 11:45 am
Speaker
William Lo
Subject
Optical Fault Isolation in Flip-Chip ICs
Description
An overview of key optical techniques—photon emission microscopy, laser voltage probing, and dynamic laser stimulation—used to probe signals in functional silicon flip-chip ICs.
Time
11:45 am -- 12:15 pm
Speaker
David Sampson
Subject
Advances in 4D and Spectral X-ray Micro-CT
Description
Explore cutting-edge mCT developments, including 4D imaging for dynamic materials analysis and spectral imaging for precise material identification, atomic number quantification, and density measurement.
Time
12:15 pm -- 1:00 pm
Speaker
Subject
Lunch
Description
Time
1:00 pm -- 1:30 pm
Speaker
Subject
Guided Lab Visits
Description
Time
1:30 pm -- 2:00 pm
Speaker
Terrence McGuckin
Subject
Digital Twins and Automated Metrology
Description
Highlights advances in physics-aware digital twins, system interoperability, and sub-nanosecond metrology using LBIC and TCAD-feedback integration.
Time
2:00 pm -- 2:30 pm
Speaker
Cecile S. Bonifacio
Subject
Ar Ion Milling for Clean SEM/TEM Prep
Description
A streamlined method for artifact-free semiconductor sample prep using broad beam milling, FIB, and ultra-low energy polishing.
Time
2:30 am -- 3:00 pm
Speaker
William A Hubbard
Subject
STEM EBIC for Advanced Semiconductor Analysis
Description
Explore how STEM EBIC enhances traditional TEM by revealing high-resolution electronic contrast, enabling deeper insights into device function and failure mechanisms.
Time
3:00 pm -- 3:30 pm
Speaker
Ken Wu
Subject
Advances in Plasma FIB for Failure Analysis
Description
An overview of the latest PFIB technologies, including the multi-ion Helios 5 Hydra system, enabling fast, Ga-free TEM prep and high-quality delayering for advanced semiconductor failure analysis.
Time
3:30 pm -- 3:45 pm
Speaker
Subject
Snack break
Description
Time
3:45 pm -- 4:15 pm
Speaker
Valerie Brogden
Subject
TEM Prep Evolution and Innovation
Description
From early methods to modern FIB workflows, this talk highlights key advances like EXpressLO grids and Helios 6 tools driving faster, precise, and scalable TEM sample preparation.
Time
4:15 pm -- 4:45 pm
Speaker
Rosalinda M. Ring
Subject
AFM-in-SEM for Semiconductor Analysis
Description
An overview of current and emerging applications of AFM-in-SEM for metrology, failure analysis, and nanoscale defect localization in semiconductor devices.

Brought to you by EDFAS

The Electronic Device Failure Analysis Society (EDFAS) mission is to foster education and communication in the failure analysis community working for the technology advancement and the improved performance and reliability of devices and materials for the electronics industry.
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Thank You to Our Sponsors

We are deeply grateful to our sponsors for generously providing the venue, as well as coffee, snacks,

and lunch to fuel innovation and collaboration throughout the workshop.

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nenovision-1
ibss
Semicaps
tescan
varioscale
fischionne